1. Field
Various embodiments of the present invention relate to a semiconductor design technology, and more particularly, to a semiconductor device including a sense amplification unit.
2. Description of the Related Art
A Dynamic Random Access Memory (DRAM) is representative example of a volatile semiconductor memory device. A memory cell of a DRAM includes a cell capacitor for storing electrical charges representing binary data and a cell transistor serving as a switch controlling the flow of the electrical charges to and from the cell capacitor.
Because electrical charges may be introduced into or discharged from the cell capacitor unintentionally due to a leakage current phenomenon, it is generally necessary to periodically perform a data re-writing operation for preserving the integrity of the stored data. Such operation is commonly known as a refresh operation. It a refresh operation, an active mode and a precharge mode are repetitively performed at predetermined regular intervals. In an active mode, as the memory cell is selected and a bit line sense amplifier is enabled, the bit line sense amplifier senses and amplifies data transferred from the selected memory cell, and transfers the amplified data back to the memory cell. In a precharge mode, as the memory cell is not selected and the bit line sense amplifier is disabled, the memory cell retains data stored therein.
As the memory cell density increases in order to increase the memory capacity of semiconductor memory devices the leakage current also increases. As a result, the data retention time of a memory cell within which data stored in a cell capacitor may be reliably maintained after a precharge operation, becomes shorter. Hence, improved technology is needed to address such concerns.